
FPGA Developer | International Master's in Embedded Systems Security | Grenoble INP - Esisar, UGA
FPGA Design Engineer with over 7 years of experience in VHDL/Verilog RTL design, signal processing, and embedded systems. Proficient in the full development lifecycle, from RTL design and timing closure (STA, CDC) to CI/CD automation and hardware validation. Skilled with Intel, AMD, Lattice, and Microchip FPGAs. Currently, I am developing FFT acceleration on RISC-V for my master's innovation project. Basic French.
Seeking an internship in FPGA/RTL design, electronics, digital signal processing, SoC architecture, or embedded systems development.